A History of Overclocking Part One

For as long as enthusiasts have had fingers to flick DIP switches, so too has existed their desire to overclock all manner of processors.

While we spend a lot of time looking forwards, sometimes it’s good to know where we came from. Sure we all take FSBs, multipliers, HyperTransport and RAM ratios for granted these days, but there was a time when only the FSB existed. Wouldn’t it be nice to have a better comprehension of what it is we actually tweak, instead of blindly punching in numbers?

With this ensconced firmly in our skulls, we burrowed into the foggy murk of PC history to analyse how overclocking developed, and we have thrown in a great deal of back story in order to increase your understanding of past eras.

Basics: How a clock works
A clock on a motherboard is generated by a clock crystal, or crystal oscillator. Typically these run at 14.318MHz, a rating that has not changed since the dawn of PCs. The oscillator uses the resonance of a piezoelectric crystal, usually quartz, which through the application of a voltage will return a reliable pulse – in this case the aforementioned 14.318MHz. This is known as the system clock.

This creates a problem though: nothing runs at 14.318MHz. To overcome this, a circuit needs to be introduced to derive the speeds required. An exception to this is in the case of dedicated chips – you’ll often find a 25MHz oscillator next to a Marvell Gigabit LAN chip or a JMicron SATA controller, and a 24.5MHz one next to a Texas Instruments 1394 controller.

A Phase-Locked Loop (PLL) is the required circuit that generates the speeds we need for modern bus operation on the motherboard. These days up to four can be found inside a clock generator – a chip usually located near a 14.318MHz oscillator that it will be in series or parallel with – driving CPU, PCI-E, SATA, PCI, memory, FSB and most other things that need a clock.

The PLL allows us to change bus speeds through a few choice components – namely a phase comparator, Voltage Controlled Oscillator (VCO) and a down counter (divider). A basic circuit is shown in Figure 1.

The reference clock leaves the oscillator and enters the phase comparator. The phase comparator has two inputs, one from the reference clock and another looped back in from the VCO. The comparator compares both frequencies and then generates a voltage based on the difference of the two inputs. If they’re the same value, it continues outputting the same voltage and the VCO keeps oscillating at a fixed rate, giving us our output frequency. In the example above, the circuit would simply produce a final frequency of 14.318MHz – exactly the same as the crystal oscillator.

In order to get a slower speed, the original processors inserted a divider between the reference frequency and the phase comparator – a divider of three for example would give 4.77MHz, the IBM XT’s frequency.

The trick to faster clocks lies in placing the divider after the VCO and feeding the result back into the comparator, such as in Figure 2.

Let’s say we give the divider a value of two. The VCO feeds in 14.318MHz to the divider, and it spits out 7.159MHz. This is fed back into the phase comparator, which suddenly thinks that it’s outputting half as much frequency as is needed – and so increases the voltage to match. This hits the VCO and a new, higher frequency is generated – in this case, 2 x 14.318 = 28.636MHz – and that is siphoned off to become our output frequency for the system. This value is fed back into the divider loop, divided again, and the number matches the original reference frequency, so the phase comparator assumes the last voltage it put out was correct and continues at the same level, maintaining the faster speed. Voila!