History of Overclocking Part Two

Craig Simms still hasn’t removed his head from the turbulent past of overclocking. He’s heard surgery can fix that.

In the first of this two part series, we covered the ancient history of processor development (read: 1983 to 1997) and examined the development of clocks and dividers -- the electrical basics of overclocking.

If you want some background information on chips ranging from the 8088 to the Pentium Pro, or if you thought for a moment that we were referring to wristwatches and scalpels, have a read of the first part of this article.

6x86
(1997-1998, 0.65µm-0.35µm process, 120-188MHz)

Cyrix does get a mention in our little history for implementing the 75MHz bus on its 6x86 and 6x86MX processors. This meant the PCI bus ran at 37.5MHz, which caused problems with some add-in cards. Cyrix caused even more problems in 1998 when it upped the speed of its MII chip to 83MHz, forcing a completely unreasonable 41.5MHz on PCI. As a result things were unstable, particularly IDE controllers.

The Cyrix 6x86 caused many a problem with both hardware and software compatibility.

K6
(1997-1998, 0.35µm-0.25µm process, 166-300MHz)

The K6 has an interesting history – unsatisfied by its own designs, AMD purchased a company called NexGen, that was developing a chip called the Nx686 at the time. As a result AMD got access to Vinod Dahm, the designer of the original Pentium who had moved to NexGen. AMD changed the design so it would fit Socket 7, included MMX support, and shipped the result. Eventually the PR ratings AMD used were dropped when it started matching the actual MHz of the CPUs. The last ever K6 used Super Socket 7, giving it access to a 100MHz bus. This is the first time AMD used a different socket to Intel, even though it was backwards compatible with other Socket 7 chips. It was a stop-gap solution to up the FSB while AMD was designing Slot A, as it no longer had rights to Intel’s sockets. This worked to AMD’s advantage – those who invested in a Super Socket 7 board had compatibility with both the upcoming K6-2 and K6-III.

Pentium II
(1997-1999, 0.35µm-0.25µm process, 233-450MHz)

The Pentium II had 512KB L2 cache, separated from the die (hence the need for the large slot-based processor) which ran at half the speed of the processor. Slot 1 arguably opened up the processor upgrade market, as it was as easy as plugging in a new cartridge and setting a jumper on the motherboard.

While the Pentium II Klamaths (0.35µm) were multiplier unlocked, the 0.25µm part ‘Deschutes’ had its multiplier hard locked by Intel in an effort to stop dealers selling overclocked processors at a higher price (and, as some have suggested, to protect its high margin market of high-end processors).

Before this, Pentium MMX processors were limited only to their maximum multiplier, so you could downshift, and before that you could choose any multiplier you wanted, within the abilities of the motherboard. This ‘locked’ policy would not change until Intel released its Pentium 4 Extreme Edition many years later.

This still didn’t stop shops overclocking and remarking their processors – PCBs were wired onto the CPU pins inside the Single Edge Contact Cartridge (SECC) to achieve the job, and as they were hidden with a big plastic block that most people would never open, it was the perfect con job.

While the multipliers could keep ramping on Intel’s side, this provided fewer and fewer returning benefits as the rest of the machine simply couldn’t keep up with the processor – and so the FSB was upped to 100MHz. This also meant standardised RAM was required, and PC100 Synchronous DRAM (SDRAM) was ratified by Intel.

No longer were RAM speeds referred to in nanoseconds, but MHz, the speed derived from the FSB. PC100 that had passed Intel’s certification process could run at 125MHz (9ns memory), allowing a nice little ceiling for overclockers. PC66 was retroactively established to allow cooperation with older Pentium II chips in newer boards. Faster cycle times meant 5-1-1-1 was now possible. These came as 168-pin 64-bit Double Inline Memory Modules (DIMM), and finally only one stick was required to run your system. CAS latency was very quickly reduced from here, and you basically had a choice of C3 or C2 chips, the C2 available for the soon-to-come PC133 standard.

Cooling came stock in two forms – either huge, black-finned heatsinks attached to the back of the SECC or for the faster processors, active-cooling replaced the heatsinks.

AGP was introduced running at 66MHz and provided a dedicated path between the slot and processor, rather than having to go over PCI and compete with other components. The standard would be revised another three times, adding a higher multiplier each time (AGP 2x, 4x, 8x), until its peak bandwidth shifted from 266MB/s to 2133MB/s. Like PCI, AGP was derived as a ratio of the FSB, which could cause issues when overclocking.

It was about this time that the famous ABIT BH6 motherboard was introduced that removed CPU/FSB jumpers from the board, replaced by BIOS settings. The industry noticed and the shift began to BIOS-controlled features. The other advantage of the BH6 was that it completely ignored Intel’s FSB auto-select system, allowing you to happily set the FSB to 100MHz on 66MHz certified chips (assuming the chip would boot at this speed). Paired with the Celeron 300A, overclocking had finally become mainstream.