Overclocking Adventures: Dry Ice Party

Onwards we pushed, feeling confident and expecting a strong showing from the X6800 we configured the following BIOS settings

Advanced
AI Tuning:	manual
CPU Frequency:	400
DRAM Frequency:	500
DRAM Divider:	4:5 divider
PCI Express Frequency:	120
PCI Clock Synchronisation Mode:	33.33
Spread Spectrum:	disabled
Memory Voltage:	2.35v
CPU Vcore Voltage:	1.7v (1.62v real)
FSB Termination Voltage:	1.45v
NB Vcore:	1.65v
SB Vcore:	1.60v
ICH Chipset Voltage:	auto

Processor Configuration
Modify Ration Support:	enabled
Ration CMOS Setting:	11
C1E Support:	disabled
Max CPUID Value Limit:	disabled
Vanderpool Technology:	disabled
CPU TM Function:	enabled
Execute Disable Bit:	enabled
PECI:	disabled

North Bridge Chipset Configuration
Memory Remap Feature:	disabled
Configure DRAM Timing by SPD:	disabled
DRAM CAS# Latency:	4
DRAM RAS# to CAS# Delay:	4
DRAM RAS# Precharge:	4
DRAM RAS# Activate to Precharge:	4
DRAM Write Recovery Time:	4
DRAM TRFC:	25
DRAM TRRD:	10
Rank Write to Read Delay:	10
Read to Precharge Delay:	10
Write to Precharge Delay:	10
Static Read Control:	disabled
Initiate Graphic Adapter:	PEG/PCI

Things didn’t seem quite right. We took the X6800 @ 4.4GHz for a quick spin with Super Pi 1M and obtained the following score:



As your can see, there was no CPU-Z frequency tab on this screenshot as we expected to push the X6800 further. Sadly, we didn’t, or rather, we quite simply couldn’t. The chip completely stone walled all effort to boot beyond 4.4GHz and only allowing an extremely unstable SetFSB tweak up to 4.5GHz before crashing. No amount of FSB and multiplier tweaking could break this barrier. The voltages were already maxed out in the BIOS and a vcore pencil mod implemented – she was done.



Not defeated, we lowered the CPU frequency and ran Orthos Stress Prime in order to melt off the rest of the dice in the pot. No doubt there are some of you exclaiming that we were only explaining moments ago how much of a precious commodity the dice is whilst benchmarking. The fact of the matter is, the extreme temperature creates such a bond between the processor IHS, TIM and the bottom of the copper pot, that the tube becomes impossible to remove from it’s mounted position without risking serious damage to the CPU and socket. This is why it is necessary to melt off the rest of the dice within the pot before preparing to dismount and reconfigure the cooling system.

Though not much dry ice was left in the copper tube by this point, it was still a shame to melt off the dice. It is important however that continued progress took place and a better performing chip crucial to obtaining that next level of performance.